In order to cope with increased number of pins of a semiconductor chip, a finer pitch, and an increase of a signal speed, there is used a semiconductor device to which flip-chip connection is applied as a mounting method with short wiring and connection. When flip-chip connection is applied to connection between semiconductor chips or connection between a semiconductor chip and a silicon interposer, solder bumps are each formed on electrode terminals of upper and lower chips (semiconductor chip, silicon interposer), the upper and lower chips are position-adjusted so that those solder bumps faces each other and then stacked, and thereafter, the solder bumps are heated and melted thereby to be connected.
In order to remove an oxide film on a solder bump surface, processes described below are usually applied. First, after a flux is applied to the solder bump surface, upper and lower chips are position-adjusted and stacked. Next, after the solder bumps are heated and melted in a reflow furnace thereby to be connected, the flux is washed and removed. However, if the flux is to be removed after connection between the upper and lower chips is done, it is difficult to completely wash the flux due to miniaturization of the solder bump itself or microfabrication of a formation pitch. Thus, a residue of the flux is becoming a problem. The flux residue causes generation of a void or peeling of an underfill agent filled between the chips.
JP-B2 3194553 describes a method in which, after an oxide film on a surface of a solder bump formed on an electrode of a semiconductor chip is removed by a flux and further the flux is washed and removed, the solder bump is pressure-bonded and temporarily fixed on an electrode of a circuit board, with a height thereof being adjusted, and the solder bump is melted in that state thereby to be connected. However, since an oxide film of a bump surface grows even at a room temperature and in the atmosphere, there is a possibility that, even if the oxide film of the bump surface is removed in advance, an oxide film grows on that surface at a time that the solder bump is temporarily fixed. If such an oxide film is sandwiched between interfaces at the time of temporarily fixing (pressure-bonding), the oxide film is left inside the bump when the solder bump is melted, causing generation of a void or a connection failure.
JP-A 2001-244283 (KOKAI) describes a method in which a semiconductor chip having a solder bump is disposed in a reduced pressure atmosphere containing carboxylic acid gas in a state of being mounted on a wiring board, and the solder bump is heated and melted in that atmosphere, whereby the semiconductor chip and the wiring board are connected while an oxide film formed on a surface of the solder bump or a wiring is removed. A necessity occurs to temporarily fix the solder bump to the wiring board in order to increase location accuracy of the semiconductor chip and the wiring board. In such a case, it becomes difficult to remove the oxide film trapped in an interface between the solder bump and the wiring board by carboxylic acid gas, causing generation of a void or a connection failure in the solder bump.
JP-A 2008-041980 (KOKAI) describes a method in which a semiconductor chip having a solder bump and an intermediate substrate are disposed in a vacuum chamber in a state of being placed to face each other, and after hydrogen radical is introduced into the vacuum chamber thereby to remove an oxide film of a bump surface, the solder bump is melted and connection is performed. In this method, since removing of the oxide film from the solder bump surface to melting of the solder bump are performed in the vacuum chamber, rise of a manufacturing cost of a semiconductor device is inevitable. Further, since conventional position adjustment by a flip-chip bonder cannot be applied, a spacer made of solder is applied to position adjustment, leading to rise of a cost or restriction in terms of design.